Agenda of SCT links meeting
9th March 1998
CERN
(1) System Tests of Links
(a) BER tests for data Links I. Mandic 10'
(b) DORIC tests and BER tests for TTC links I. Mandic 10'
(2) DORIC4
(a) Specifications. D. White 10'
(b) Characterisation of VCSELs for TTC distribution. I. Mandic 10'
(3) Results with MITEL/GEC VCSELs T. Weidberg 10'
(4) Radiation Tests
(a) Preparation for high staistics PIN tests. B'ham 10'
(b) Honeywell PINs. I. Mandic 5'
(5) Status of links for system tests '98.
(a) Packages, ASICs, tests T. Weidberg 10'
(b) PIN receiver module A. Rudge 10'
(6) Fibre instalation and radiation hardness J. Dowell 15'
(7) Project Plan. G. Noyes 15'
(7) AOB
Minutes
(1) Igor Mandic (Oxford) reported on Bit Error Rate (BER) Tests of Data Links.
The test system used LDC to drive an LED in a GEC opto package and SEQSI and
LITMUS modules to measure BER. BER of less than 10**-9 could be achieved
with LED optical powers of about 2 microW (cf 17 microW average before
irradiation).
Igor also reported on BER measurements of a TTC link. The link used the
the BiLED chip to encode BiPhase Mark data. The data was received
by a PIN diode and DORIC mounted in a GEC opto package. BER measurements
were also performed with SEQSI and LITMUS.
The results showed that
(a) sending 2 "1"s followed by 14 "0"s worked with BER < 10**-9 provided
the timing was adjusted carefully.
(b) sending 3 "1"s followed by 13 "0"s worked with BER < 10**-9 only over a
tiny range of timing
(c) sending psuedo-random data the BER was never below 10**-4.
These problems are all believed to be due to timing; the DORIC chip only
accepts data if the appropriate transitions are within a 2ns gate. This
problem will be fixed in the next itteration of DORIC by opening up this
gate width (see talk by Marcus French).
(2) Marcus French (RAL) discussed the problems with DORIC. DORIC works
correctly if the input signals have perfect timing as demonstarted by Dave
White's tests at RAL and also by the tests at Oxford (see item 1 above).
The very narrow gate clearly makes DORIC very difficult to use in practice
and so the solution will be simply to widen that gate from 2ns to about
10ns. Since we will use VCSELs for the TTC distribution, the light levels
will be much larger. The new DORIC will be optimised for these light
levels.
(3) Igor Mandic (Oxford) reported on VCSEL driver studies. The waveformed of
Honeywell VCSELs driven by the BiLEd and LDC chips were studied with an
optical probe. Some undershoot and overshoot of the signals were seen but
these could be minimised by prebiasing the VCSELs with about 4mA (the
threshold was 5mA). Dave White will perform a more systematic study of
VCSEL drivers to determine the optimum circuitry to use for driving VCSELs.
(4) Tony Weidberg (Oxford) reported on results GEC had with MITEL VCSELs in
their Silicon opto package. It was easy to obtain >500 microW optical power
at 10 mA drive current. There were no modal problems. Good results were
obtained for BER tests at 100 MHz and 1 GHz. A package with two VCSELs has
now been provided to us for our tests.
(5) Radiation Tests.
(a) Gilles Mahout (Birmingham) reported on the status of the high staistics PIN diode
irradiation program. 15 tiles, each with 8 epitaxial Si PIN diodes have
been delivered. They will be used as follows
(1) 3 tiles kept for reference
(2) 12 tiles will be irradiated at ISIS with 2 10**14 n/cm**2
(a) 6 of these will then be irradiated to 6 10**14 n/cm**2
(b) 6 of these will then be irradiated to 3 10 **14 p/cm**2 at the PS.
(6) Links for System Tests in '98.
(a) Tony Weidberg reported on the availability of parts for this work. Pedja
reported on the dog-leg cables and opto-boards in another meeting later in
the week. The first of the 16 GEC LED/PIN package has now been delivered
and the rmaining 15 will be delivered in 4 weeks. Pete Shield (Oxford) has
started a design of a very low jitter and adjustable BiPhase Mark encoding
board. It should be possible to make the TTC links work with low BER with
this board.
(b) Alan Rudge (CERN) reorted on the status of the opto-reciver. The module
will use the AME 8 channel PIN array which can be connected to an MT-8
fibre ribbon. Simple commerical chips are used for the pramp and
discriminator (see transparency copies for details). The boards will be
avalible for BER tests in May.
(7) John Dowell (Birmingham) discussed the question of fibre instalation.
Robert McLaren (CERN) will look at the fibre routing from the patch panel
to the RODs. We need to investigate a second source of rad-hard fibre.
There should be a first design of fibre routing for the June SCT week.
(8) Gareth Noyes (RAL) reported on the SCT links project plan. The project is
divided into three sub-projects
(a) System Tests '98
(b) Development
(c) Production
A clear interface between the links and the off-detector electronics needs
to be defined so that detailed engineering work can proceed. A more
detailed project plan should be available for the next SCT week in June.